Improvement of the P/E window in nanocrystal memories by the use of high-k materials in the control dielectric
- Authors: Spitale, E.; Corso, D.; Crupi, I.; Lombardo, S.; Gerardi, C.
- Publication year: 2005
- Type: Articolo in rivista (Articolo in rivista)
- OA Link: http://hdl.handle.net/10447/179556
Abstract
In this paper nanocrystals memories program curves are shown and their saturation points (steady state condition) can be observed. We present a model that relates the voltage shift at the steady state (ΔVTss) to the gate program voltage (VG). Starting from a good agreement between experimental data and simulations for nanocrystals memory cells with a conventional dielectric structure (SiO2), we present the estimated values of the ΔVTss vs VG for different control stacks. Our investigation shows an improvement if a material with a high dielectric constant and a small conduction band-offset with respect to the SiO2, is placed between two SiO2 layers when the first of them is very thin. © 2004 Elsevier Ltd. All rights reserved.