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GIANLUIGI CHIARELLO

Field Programmable Gate Array

  • Authors: Gianluigi Chiarello, Claudio Chiri, Giuseppe Cocciolo, Alessandro Corvaglia, Francesco Grancagnolo, Marco Panareo, Aurora Pepino and Giovanni Francesco Tassielli
  • Publication year: 2017
  • Type: Capitolo o Saggio
  • OA Link: http://hdl.handle.net/10447/619037

Abstract

In this chapter, we describe the design of a field programmable gate array (FPGA) board capable of acquiring the information coming from a fast digitization of the signals generated in a drift chambers. The digitized signals are analyzed using an ad hoc real‐time algorithm implemented in the FPGA in order to reduce the data throughput coming from the particle detector.