On the Optimal Design of Multi-Stage Cascaded Transistor Amplifiers with Noise, Gain and Mismatch Constraints

Abstract

The problem of evaluating the optimal performances of cascaded, unbalanced, multi-stage transistor amplifiers is addressed. In particular, a theoretically rigorous approach is proposed for the determination of a family of Optimal Design Curves (ODC's) which express the best noise-gain tradeoff that can be achieved - at each frequency and device operating condition - when a simultaneous constraint on amplifier input VSWR is accounted for. Such curves can be used as a more meaningful starting point in practical amplifier design in place of the approximate calculations so far employed for target performance or optimization goals determination